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A new wafer technology, named CDS (Crystallization on Dipped Substrate), is under development and has been found to be effective in the reduction of wafer cost and silicon feedstock. CDS technology was applied to 156mm × 156mm sized wafers, obtained via the throughput of 1825cm2/min, and the resulting cell efficiency of 14.8% was confirmed. This paper outlines the principle behind the technology and outlines the procedure.
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